[Comp-neuro] 3 brief papers on STDP and memristance

bernabe bernabe at imse-cnm.csic.es
Sat Jan 30 20:52:40 CET 2010

Readers of this list might be interested in the following three brief 
communications, which can be downloaded from 

The communications relate to the natural appearance of STDP 
(spike-time-dependent-plasticity) when combining a given class of action 
potential waveforms with synapses obeying a memristive type of behavior. 
The memristor was postulated in 1971 as a missing 2-terminal circuit 
element (like resistors, capacitors, or inductors) from pure circuit 
theoretic considerations. In 2008 the HP labs announced the construction 
of the memristor as a new nano scale device, and showed that memristance 
appears naturally when electric fields control the motion of substances 
at the nano scale.
In [1] we show that the synaptic learning rule named STDP, measured on 
real neural synapses and characterized by a
given mathematical learning function, appears in an exact manner when 
combining memristance with action potentials of
a specific shape. This suggests that some kind of nano-scale 
electric-field-driven motion of substances might be
responsible for synaptic STDP learning. If readers of this list have 
further hints on this issue, we would greatly appreciate any feedback.

In [2] we provide memristive architectural topologies combined with 
specific neuron circuits that yield to asynchronous STDP systems, like 
in biology. We also show that the STDP function can be modulated by 
shaping the action potential waveforms.

In [3], using a memristor macromodel for circuit simulations, we 
demonstrate through electrical circuit simulations that such 
architectures are scalable to arbitrary size. And we use such computing 
principles on pattern recognition systems of the type of feed forward 
spiking convolutional neural networks.

Feedback, comments, criticisms, etc. are greatly welcome.

[1] B. Linares-Barranco and T. Serrano-Gotarredona, “Memristance can 
explain Spike-Time-Dependent-Plasticity in Neural Synapses,” Nature 
Precedings <http://hdl.handle.net/10101/npre.2009.3010.1> 31st March, 2009.
[2] B. Linares-Barranco and T. Serrano-Gotarredona, “Exploiting 
Memristance in Adaptive Asynchronous Spiking Neuromorphic Nanotechnology 
Systems,” Proc. IEEE NANO, July 2009.
[3] J. A. Pérez-Carrasco, C. Zamarreño-Ramos, T. Serrano-Gotarredona, 
and B. Linares-Barranco, "On Neuromorphic Spiking Architectures for 
Asynchronous STDP Memristive Systems," accepted for presentation at the 
2010 IEEE Symp. on Circuits and Systems, Special Session on 
"Neuromorphic Nano Devices Adaptive Sensing & Processing Systems". 

ATTENTION: NEW DOMAIN. We moved from imse.cnm.es to imse-cnm.csic.es
Bernabe Linares-Barranco, PhD
Full Professor (Profesor de Investigacion) CSIC
Instituto Microelectronica Sevilla (IMSE)        Phone: 34-954-466643/66
National Microelectronics Center, CNM-CSIC            Fax: 34-954-466600
Av. Americo Vespucio s/n     E-mail: Bernabe.Linares(AT)imse-cnm.csic.es
41092 Sevilla, SPAIN           URL: http://www.imse-cnm.csic.es/~bernabe

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